At present, reception apparatuses for receiving a digital broadcast or the like need to perform correction operations such as timing correction and phase noise correction, when receiving a broadcast wave or the like and subjecting the received signal to digital demodulation, for example. In general, these corrections are performed in a seamless manner by correction circuits for performing automatic control based on control engineering.
For example, FIG. 1 is a block diagram of a known correction circuit.
As illustrated in FIG. 1, the correction circuit 11A includes a correction section 12, an error detector 13, a loop filter 14, and a numerically controlled oscillator (NCO) 15, which form a feedback loop.
A reception signal received by a reception circuit having an antenna (not shown) is supplied to the correction section 12. The correction section 12 subjects the reception signal to correction of removing an error (e.g., a frequency error, a phase error, etc.) in the reception signal based on an error correction signal supplied from the NCO 15. Then, the correction section 12 supplies the resulting reception signal obtained after the correction to the error detector 13, and at the same time outputs the resulting reception signal to a signal processing circuit 21 in a subsequent stage, such as a demodulation circuit or a decoding circuit, for example.
The error detector 13 detects an error in the reception signal obtained after the correction as supplied from the correction section 12, and supplies a corresponding error signal to the loop filter 14. The loop filter 14 filters the error signal supplied from the error detector 13 to smooth the error signal, and supplies the smoothed error signal to the NCO 15. In accordance with the error signal supplied from the loop filter 14, the NCO 15 controls an oscillation frequency of the error correction signal to be supplied to the correction section 12, to generate the error correction signal with an oscillation frequency corresponding to the error.
Then, the reception signal is corrected by the correction section 12 based on the error correction signal supplied from the NCO 15 so that the error in the reception signal outputted from the correction section 12 will be decreased. If the error in the reception signal outputted from the correction section 12 is thus decreased to such an extent that it falls into a predetermined error range, the correction of the reception signal is completed. That is, the reception signal is captured.
When the reception signal has been captured in the above-described manner, the correction circuit 11A shifts from an initial capture process for capturing the reception signal to a synchronization maintenance process for maintaining synchronization of the captured reception signal. In the reception apparatus, a lock signal outputted from the correction circuit is used as a trigger for the shift of the process.
A correction circuit 11B as illustrated in FIG. 2 includes a lock detector 16 that outputs the lock signal.
In FIG. 2, the error signal outputted from the error detector 13 is supplied to the lock detector 16. The lock detector 16 monitors the error signal. When the error in the reception signal has fallen into the predetermined error range, the lock detector 16 supplies the lock signal, indicative of the capture of the reception signal, to the signal processing circuit 21.
FIG. 3 is a flowchart for explaining a known initial capture process.
For example, once the reception apparatus starts reception of the signal, the initial capture process is started. At step S11, the correction of the reception signal is started by the feedback loop formed by the correction section 12, the error detector 13, the loop filter 14, and the NCO 15, while the monitoring of the error signal is started by the lock detector 16.
At step S12, the signal processing circuit 21 determines whether or not the lock signal has been supplied from the lock detector 16.
If the signal processing circuit 21 determines at step S12 that the lock signal has not supplied from the lock detector 16, control proceeds to step S13. At step S13, the signal processing circuit 21 determines whether or not a capture completion time, which is set as a time for capturing the signal, has elapsed since the start of the correction of the reception signal at step S11.
If the signal processing circuit 21 determines at step S13 that the capture completion time has not elapsed, control returns to step S12.
Meanwhile, if the signal processing circuit 21 determines at step S13 that the capture completion time has elapsed, control proceeds to step S14. At step S14, the signal processing circuit 21 finishes the correction of the reception signal by the correction circuit 11B.
After the process of step S14, control proceeds to step S15. At step S15, the signal processing circuit 21 performs a process that should be performed when the reception signal has not been captured within the predetermined capture completion time. Examples of this process include a process of displaying, on a display section (not shown), an indication that the reception of the reception signal has ended in failure. Then, the initial capture process is ended.
Meanwhile, if the signal processing circuit 21 determines at step S12 that the lock signal has been supplied from the lock detector 16, control proceeds to step S16. At step S16, the process of shifting from the initial capture process to the synchronization maintenance process is performed. For example, in general, a band of the loop filter 14 is set to be wide in the initial capture process and narrow in the synchronization maintenance process, with the view of securing a suitable capture range and in view of process stability in the subsequent stage. That is, at step S16, the band of the loop filter 14 is shifted from a wide band to a narrow band.
After the process of step S16, the initial capture process is ended.
An interpolation filter and a timing phase error detector, for example, may be used as the correction section 12 and the error detector 13, respectively, in the structure of the correction circuit 11B, to perform timing recovery (timing correction).
FIG. 4 is a block diagram illustrating an exemplary structure of a correction circuit 11C that performs the timing recovery.
In the correction circuit 11C, a timing phase error detector 17 detects a timing phase error in the reception signal as outputted from an interpolation filter 18, and an error correction signal based on the timing phase error is supplied from the NCO 15 to the interpolation filter 18. Then, in accordance with the error correction signal supplied from the NCO 15, the interpolation filter 18 adjusts timing for a frequency with which the reception signal is sampled, to correct deviation in timing of the reception signal.
For example, Japanese Patent Laid-open No. 2002-94585 discloses a reception apparatus that adjusts a gain of a loop filter based on a result of detection of an error in the reception signal.
As described above, in general correction circuits, the band of the loop filter is set to be wide in the initial capture process and narrow in the synchronization maintenance process. However, if the band of the loop filter is too wide, compared to the error in the reception signal, in the initial capture process, a capture time, which is a barometer of digital demodulation performance, may become long.
Specifically, in the case where the band of the loop filter is too wide, compared to the error in the reception signal, variations in the amount of correction by the feedback loop might be so great as to make convergence of the correction amount difficult to achieve, resulting in an extended time required to achieve the convergence of the correction amount and completion of the correction. As a result, the capture time, which is a time required to complete the correction of the error, becomes long.
On the other hand, if the band of the loop filter is set to be narrow in the initial capture process, it may become difficult to capture a reception signal with a great error. Therefore, it is necessary to set the band of the loop filter to be wide enough to secure a suitable capture range.
As such, there has been a desire to enable efficient signal capture, i.e., to reduce the time required to capture a reception signal with a small error while at the same time allowing the capture of a reception signal with a great error.